Design Linked Incentive (DLI) Scheme: Why Applications Get Rejected and How to Fix It

Why DLI applications get rejected

Most Design Linked Incentive (DLI) Scheme rejections come down to four things: failing the Indian-ownership test, having no genuine semiconductor design content, submitting a weak Detailed Project Report (DPR), or applying as an individual when the scheme is only for registered entities. The DLI Scheme is an evaluated industry incentive run by C-DAC under MeitY, so a proposal must survive a committee review, not just a document check. This article breaks down each failure and its fix; the Design Linked Incentive (DLI) Scheme pillar covers who is eligible and what the incentive pays.

Rejection 1: Ownership test failed

The single hardest gate is beneficial ownership. An applicant must have more than 50% of its capital beneficially owned by resident Indian citizens on the date of application, in line with the FDI Policy Circular. If foreign or non-resident shareholding tips the entity to 50% or below, the application fails.

Fix: Recalculate the shareholding pattern on a fully-diluted, beneficial-ownership basis before applying, including convertible instruments. If a funding round is about to dilute resident Indian ownership below the threshold, either apply before it closes or restructure so resident Indian beneficial ownership stays above 50%. Remember the commitment to retain domestic status for three years after claiming incentives. A plan that will breach that within three years is a problem even if it passes on day one.

Rejection 2: No genuine semiconductor design content

The scheme funds design of ICs, chipsets, SoCs, systems and IP cores. Proposals that are really board-level integration, assembly, trading or import; or purely software with no semiconductor design, are outside scope and get rejected.

Fix: Make the design work unmistakable in the DPR. State the technology node, the design deliverables (RTL, layout, tape-out), and what is being designed in India versus bought in. If the core value is a PCB or a software stack around an off-the-shelf chip, this scheme is the wrong instrument.

Rejection 3: A weak Detailed Project Report

A vague DPR is the most common fixable reason. Rejections cite unclear milestones, no technology node, no credible deployment plan, or unsupported cost estimates. The committee cannot fund a project it cannot evaluate.

Fix: Rebuild the DPR around verifiable milestones tied to money, because incentives are reimbursed against verified milestones. For each milestone give a deliverable, a date, and the eligible expenditure. Justify costs with quotes or audited comparables, the audited financial statements you submit will be cross-checked against claimed spend. Include a deployment path showing how the design will ship in a commercial electronic product, since the Deployment Linked Incentive depends on actual net sales.

Rejection 4: Product already commercially mature

The incentive exists to de-risk design. If the product already sells at scale, there is nothing left to de-risk, and the proposal can be turned down on that basis.

Fix: Apply for the design phase that genuinely needs support — a new node, a next-generation part, or a redesign with real technical risk, not a product that is already established.

Rejection 5: Incomplete submission

Applications are also bounced for missing audited accounts, a missing Rs 10,000 fee receipt, or missing shareholding proof. These are avoidable.

Fix: Before submitting, confirm all mandatory uploads are present: certificate of incorporation, proof of Indian beneficial ownership, the DPR, latest audited financial statements, the fee receipt, and (if applying in that category) DPIIT startup recognition or Udyam MSME registration. Screening for completeness happens first, so a missing file can stop you before evaluation even begins.

Rejection 6: Applied as an individual

Individuals cannot apply. There is no personal stipend, scholarship or grant route. A student, engineer or researcher applying personally will be rejected.

Fix: Apply through a registered entity. A domestic company, DPIIT-recognised startup or Udyam-registered MSME. Individual researchers wanting chip-design support should instead look at MeitY's Chips to Startup (C2S) programme, which works through academic institutions.

How to respond to a rejection or query

1. Read the exact reason given by C-DAC before resubmitting: fixing the wrong thing wastes a round.
2. If it is a completeness query, supply the missing document through the portal promptly.
3. If it is a substantive rejection (ownership, design content, DPR quality), fix the underlying issue and reapply in the next open round, since the scheme runs in rounds.
4. Escalate genuine grievances through the official channels: C-DAC support +91-120-2210800 (Ext 721), support.chips-dli@cdac.in and pmudli@cdac.in, or the India Semiconductor Mission at ism-dic@gov.in.

Never pay an agent who claims to guarantee approval. All approvals are made by the evaluation committee constituted by MeitY, and the only government fee is the Rs 10,000 registration fee paid on chips-dli.gov.in.